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Cisy 201:Computer Organization And Architecture Question Paper
Cisy 201:Computer Organization And Architecture
Course:Computer Science
Institution: Kenya Methodist University question papers
Exam Year:2015
KENYA METHODIST UNIVERSITY
END OF 1''st ''TRIMESTER 2015 (FT) EXAMINATION
FACULTY : COMPUTING & INFORMATICS
DEPARTMENT : COMPUTER SCIENCE
UNIT CODE : CISY 201/BBIT 112/DCIS 105/DBIT 125
UNIT TITLE : COMPUTER ORGANIZATION & ARCHITECTURE
TIME : 2 HOURS
INSTRUCTIONS
Answer question One and any other Two questions.
Question One (30 Marks)
Using an illustrative diagram as necessary, describe the characteristics and components of a programmable machine based on the Von-Neumann model.
(5 marks)
Write brief comparative notes on the bus and the central switch based system interconnection structures.
(5 marks)
Outline the internal organization of the hard-disk using the terms cylinder, head, track and sector.
(4 marks)
.
Briefly explain the role of the cached memory in a typical computer system.
(2 marks)
Provide a convincing argument that the presence of an appropriate sized cache results in overall system performance enhancement
(3 marks)
Briefly explain instruction pipelining as a performance enhancement technique.
(3 marks)
Superscalar architectures endeavor to exploit instruction level paradism (ILP). Explain
(3 marks)
Using an illustrative diagram explain the shared disk multi-computer cluster architecture. Also, explain the objectives of highly available server and fault tolerant server design approaches.
(5 marks)
Question Two (20 marks)
RAID level 1 (disk minoring) is popular with server systems. Explain how it contributes to system reliability, performance or both
(5 marks)
Describe the components of an instruction cycle and explain with justification the idea of interrupts and how interrupts are supported.
(5 marks)
Describe the typical 3-level hierarchical memory organization employed by many computer systems and provide a convincing justification for its use.
(5 marks)
Using the standard parallel interface as an example, describe the general organization including the programming model, of an 1/0 device interface adapter.
(5 marks)
Question Three
In the content of performance enhancement using parallelism, explain the terms available parallelism and utilized parallelism.
(2 marks)
Explain the basic characteristic of flash ROM and its applications in main memory subsystem, 1/0 subsystem and mass storage subsystem. (5 marks)
Explain why LRU is considered the perfect replacement policy in cached memory performance.
(3 marks)
Describe how antidependency is a problem in superscalar processing.
(5 marks)
Write brief notes on the ASC and RISC philosophies of architecture.
(5 marks)
Question Four
Explain the concept and possible justification for multiplexing the data and address signals on the same set of signal lines.
(5 marks)
Describe the functions of the registers that are defined in the Von Neumann model: PC, IR, MAR, MDR. Explain the usage of the registers during instruction fetch cycle.
(5 marks)
In the context of program references to memory, explain the principle of locality and its relevance to the hierarchical organization.
(5 marks)
Given that some Pentium bus runs at 100 MHz, the (data) bus width is 64 bits, and the address bus width is 36 bits. Explain the meaning of those two specifications and determine the bandwidth in mbps.
(5 marks)
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