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Phys 323: Digital Electronicsphys 323: Digital Electronics Question Paper

Phys 323: Digital Electronicsphys 323: Digital Electronics 

Course:Bachelor Of Science & Bachelor Of Education (Science)

Institution: Chuka University question papers

Exam Year:2013





CHUKA

UNIVERSITY

UNIVERSITY EXAMINATIONS
THIRD YEAR EXAMINATIONS FOR THE AWARD OF DEGREE OF
BACHELOR OF SCIENCE & BACHELOR OF EDUCATION (SCIENCE)
PHYS 323: DIGITAL ELECTRONICS
STREAMS: BSC (GEN), BED (SCI) Y3S2 TIME: 2 HOURS
DAY/DATE: THURSDAY 25/4/2013 11.30 AM – 1.30 PM
INSTRUCTIONS:

ANSWER QUESTION ONE (COMPULSORY) AND ANY OTHER TWO QUESTIONS

QUESTION ONE (COMPULSORY) (30 M ARKS)

1. (a) Convert the following into the indicated number system.

(i) ?263?_10 into octal number [2 Marks]


(ii) ?CF83?_16 into decimal number [2 Marks]


(iii) ?1101101?_2 into decimal number [2 Marks]

(b) The diagram in figure 1 shows a 2-input AND gate with input pulse train applied
at A and a HIGH signal applied at B.






b d f
a c e g A
Y
1

B
Fig 1: 2-input AND gate. Draw the output pulse train [3 Marks]
(c) Differentiate between asynchronous and synchronous digital systems
[2 Marks]

(d) Draw a well–labelled diagram of a clocked RS flip-flop using NAND gates.
Derive its truth table and its wave form. [6 Marks]
(e) Simplify the following logical expression using K-map and implement them using suitable logic f=?¦?(2,4,6,10,14)? [6 Marks]
(f) What are the two main advantages of full adder over half adder arithmetic circuits. [2 Marks]
(g) State DeMorgan’s theorem in equation form and explain the stated equation. [3 Marks]
(h) Subtract: 76425-28321, using 9’s complement methods. [2 Marks]
2. (a) (i) Using DeMorgan’s theorem, simplify the following expression:

X=((A ¯+C)(B+D ¯ ) ) ¯ [4 Marks]

(ii) Using NAND gates and inverters only, implement the expression in
a(i) above [4 Marks]

(b) Convert the circuitry in figure 2 to NAND gate circuitry. [4 Marks]











Figure 2: Digital logic
(c) Draw the symbol representation of an exclusive OR gte (E- OR) of two inputs. Give its truth table. [4 Marks]

(d) Given the following sum-of –product expression f=AB+BCD+EFGH
Draw its logic gates. [4 Marks]
3. (a) In the truth table 1,A,B,C and D are inputs while Y is the output gate.

Table 1: Truth table of a digital system.

A B C D Y
0 0 0 0 1
0 0 0 1 0
0 0 1 0 1
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1

From the truth table;

(i) Write the unsimplified Boolean expression [2 Marks]

(ii) Draw a 4-variable Karnaugh map [4 Marks]

(iii) Write the simplified Boolean expression based on the karnaugh map
[2 Marks]

(iv) Draw logic circuit using AND – OR gates. [3 Marks]

(v) Draw logic circuit using NAND gates only [5 Marks]

3. (b) Solve the following using complements indicated.

(i) ?1010100?_2-?1000100?_2, using 1’s complement. [1 Mark]

(ii) 72532 – 03250, using 10’s complements [2 Marks]

(iii) ?1010100?_2-?1000100?_2 using 2’s complement. [1 Mark]

4. (a) (i) Using a suitable labeled diagram show the internal circuitry of an edge
triggered J-K flip-flop. Using NAND gates. Draw its truth table with brief explanation. [6 Marks]

(ii) State the basic difference between a J-K flip - flop and Rs flip – flop.
[2 Marks]

(iii) Draw a well – labeled internal circuitry of a D – Latch and use its truth
table to explain how its operates. [6 Marks]

(b) A half adder has two inputs and sum and carry outputs.

(i) Draw its truth table. [2 Marks]

(ii) Write its logical expressions. [2 Marks]

(iii) Draw its internal circuitry. [2 Marks]

5. (a) Discuss the laws of Boolean algebra with clear illustrations. [6 Marks]

(b) Given the following product –of-sums expression;

f=(A+B)(C+D+E)(F+G+H+I) draw its logic gates. [4 Marks]

(c) (i) A warning light is to glow when the main switch A is on provided that
either switches A and B or C and D are turned on. Assuming that logic 1 and 0 are produced when switches are closed and opened respectively. Design a minimal logic using AND gates and OR gates only to produce a logic 1 signal when the light is on. [6 Marks]

(ii) Re design the circuit using two-input NaND gates only. [4 Marks]

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