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Digital Electronics Question Paper

Digital Electronics

Course:Bachelor Of Science In Information Technology

Institution: Kca University question papers

Exam Year:2010

UNIVERSITY EXAMINATIONS: 2009/2010.
FIRST YEAR EXAMINATION FOR THE DEGREE OF BACHELOR OF
SCIENCE IN INFORMATION TECHNOLOGY
BIT 1202: DIGITAL ELECTRONICS
DATE: APRIL 2010 TIME: 2 HOURS
INSTRUCTIONS: Answer question ONE and any other TWO questions
Question One
a) Copy and fill the addition table for the hexadecimal (base-16 ) given the formula,
SH = PH + QH, showing your working how S1 to S8 are obtained. (4 Marks )
Q D A F
P S X X X
F X S1 S2 S3
9 X 16 S4 S5
C X S6 S7 S8
b) Draw and label the logic symbol and truth table for each of the following 2-input logic gates:
i) NAND ii) Exclusive-OR (XOR) ( 4 Marks )
c) ( i) Draw the logic circuit, with its corresponding truth table, for an R-S flip-flop using
2-input NOR-gates only
(ii) Implement the following logic function using 2-input NAND-gates only
F = ( A B + B C)
(8 Marks)
2
d) A digital system is represented by the uncompleted truth- table of fig. Q1 (d)
Decimal A B C
( BINARY )
i) Copy and complete table.
ii) Express the function F as a standard sum-of-products (SOP).
iii) Simplify the function by applying Boolean Algebra only.
iv) State the function F as a standard product-of-sums (POS).
v) Hence, or otherwise simplify the POS-expression by applying Boolean Algebra only.
(14 Marks )
Question Two
a) Derive the truth-table for a 3-input XOR-gate where the inputs are A, B, C and the output is
Y. ( 2 Marks )
b) i) Write down the output function Y in part (a) in a standard sum-of-products form.
(ii). Draw the circuit diagram of the function Y in part (a) using 3-input and 4-input NANDgates
only. Assume that A, B, C have their own inverse bus-bar signal lines. (5 Marks)
c) Tabulate a 3-bit Binary-code and its equivalent 3-bit Gray-code. ( 4 Marks )
d) For the decimal numbers 0 to 9, draw a table and fill in the 4-bit codes given below and Ex-3
(excess-3)
3
8 4 2 1, 7 4 2 1, 8 4 2 1
(9 Marks)
Question Three
a) Given the function below, draw a digital circuit diagram to implement the function X using
NOT-gates and 2-input AND-gates only.
X = ( A B + A B )
(6 Marks)
b) A logic function is given below:
Y = ( A + B) ( A +B )
Draw a digital circuit diagram using NOT-gates and 2-input OR-gates only. (6 Marks)
c) A POS expression is given by the function:
Z = ( A + B) ( A + C ) ( B + C)
Draw a circuit diagram using two 2-input OR-gates, one 2-input NAND-gate and two 2-
input AND-gates only. (4 Marks)
d) A simple digital function is given by: P = ( A+B+C ).
Draw a digit circuit for P using 2-input NOR-gates only. ( 4 Marks )
Question Four
a) The Karnaugh-map in table Q4 represents a logic function W (AB horizontally and CD
vertically)
00 01 11 10
00 1 0 0 1
01 0 1 1 1
11 0 1 1 1
10 1 0 0 1
Table Q4
Copy the table two times and derive;
(i) the simplified SOP expression for W.
(ii) the simplified POS expression for W. ( 8 Marks)
b) A digital system is given by the function.
F ( A,B,C,D ) = S m ( 0 , 2 , 3 , 4 , 6 , 7 , 10 , 11 )
By using K-maps, obtain the simplified;
(i) Sum-of-products form for F,
(ii) Product-of-sums form for F. ( 8 Marks )
c) Obtain the inverse and dual of the following expression. (Do not expand or simplify the
given expression):
F = ( A + B) ( A + C ) D
(4 Marks )
Question Five
a) i) Draw a well-labeled circuit diagram of a clocked D-type flip-flop using NAND-gates
only.
ii) Give the truth-table of the flip-flop in part (i). (6 Marks )
b) A 16 kHz clock signal is reduced to a 75 Hz-signal. Determine the number of flip-flops
required for the reduction process. ( 4 Marks)
c) Draw an 8-bit D/A ( digital-to-analogue ) converter. Explain how it operates. (4 Marks)
d) Draw a block diagram of a 16 x 4 memory IC and explain how it works. (6 Marks )

Digital Electronics Question Paper

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