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Inte 216:Computer Organization And Architecture Question Paper

Inte 216:Computer Organization And Architecture

Course:Bachelor Of Science In Information Technology

Institution: Kabarak University question papers

Exam Year:2012

UNIVERSITY EXAMINATIONS
2011/2012 ACADEMIC YEAR
FOR THE DEGREE OF BACHELOR OF SCIENCE IN INFORMATION TECHNOLOGY
INTE 216: COMPUTER ORGANIZATION AND ARCHITECTURE
DAY: THURSDAY DATE: 29/03/2012
TIME: 9.00 – 11.00 A.M. STREAM: Y2S1
INSTRUCTIONS:
ATTEMPT QUESTION
ONE
AND ANY OTHER
TWO
QUESTION ONE (30 MARKS)
a)
With aid of a well label diagram explain the basic structure of a computer (6marks)
b)
Convert the following decimal numbers to hexadecimal
i.
255d
ii.
127d
iii.
64d (6marks)
c)
The following are some of the major components of a processor. Explain the functions of each.
i.
ALU
ii.
Control unit
iii.
Register unit
iv.
Program counter
v.
Stack pointer (10marks)
d)
Differentiate between memory mapped I/O and peripheral mapped I/O (4marks)
e)
Briefly explain the following types of ROM
i.
Masked ROM
ii.
PROM (4marks)
Page
2
of
3
QUESTION TWO (20 MARKS)
a)
If the memory chip size is 1024 x 4 bits. Design a memory map that will make 2048 bytes
(6marks)
b)
Memory system has 16 address lines. It is required that only ten address lines are used for
memory selection and the remaining be used for chip select
ion. Design this memory
system considering two chips are available. (6m
arks)
c)
Explain the operation of the following external memory
devices
i.
Compact disk
ii.
Hard drive disk
iii.
Flash memory
iv.
Magnetic tape (8marks)
QUESTION THREE (20 MARKS)
a)
Describe what is meant by an assembly language.
(2marks)
b)
What is cache memory? In line with cache memory expl
ain the following
i.
Locality of reference
ii.
Hit ratio
iii.
Mapping (8marks)
c)
Explain the following in relation to virtual memory
i.
Paging
ii.
Page replacement. (6marks)
QUESTION FOUR (20 MARKS)
a)
The following is a generation of integrated circuit. Dis
cuss them in detail.
i.
Large scale integration
ii.
Medium scale integration
iii.
Very large scale integration (6marks)
b)
Briefly describe the following cache memories techniques. Include necessary diagrams.
i.
Direct addressing
ii.
Associative addressing
iii.
Set-associative addressing (12marks)
c)
What is a virtual memory? Explain how this techniques is achieved in computer systems
(4marks)
Page
3
of
3
QUESTION FIVE (20 MARKS)
a)
Define what is meant by parallel processing in computer systems (2marks)
b)
Differentiate be SIMD and MIMD computers (4marks)
c)
Describe the following interrupt techniques
i.
Polling
ii.
Round robin
iii.
DMA (6marks)
d)
Describe the following computer chip integration
i.
Large scale integration
ii.
Medium scale integration
iii.
Very large scale integration (6marks)
d)
What is a memory decoder? Give an example (2marks)

Inte 216:Computer Organization And Architecture Question Paper

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